The present disclosure relates to a semiconductor memory device and, more particularly, to a flash memory device capable of reducing the coupling between adjacent memory cells in the same row of the memory device.
In recent years, applications for storage devices such as volatile memories and non-volatile memories have been rapidly spreading to mobile devices, such as MP3 players, PMPs, cellular phones, notebook computers, PDAs, and the like. Such mobile devices typically require mass storage devices to provide their various functions, for example, a moving figure reproducing function. Many efforts have been made to satisfy such storage requirements. As one of such efforts, a multi-bit memory device has been proposed that stores 2-bit data or more data bits per cell. In the following a memory cell storing multi-bit data is called an MLC, and the mass storage devices can be implemented to integrate more memory cells per unit area according to advances in process technologies.
In the case of designing the MLC flash memory device, narrower threshold voltage distributions are required in order to secure wider read margins. In accordance with a well-known Incremental Step Pulse Programming (ISPP) technique, before performing the ISPP, a step-shape voltage is applied to a word line in order to shift the threshold voltages of the memory cells into a target threshold voltage. This is called a “convergence program operation”. After the convergence program operation, the memory cells are programmed to have threshold voltages that are equal to or higher than a verify voltage.
FIG. 1A is a diagram for use in describing a program method according to a conventional flash memory device.
Referring to FIG. 1A, memory cells in a threshold voltage distribution 10 are programmed to have a threshold voltage distribution 20 using pulse voltages of a constant increment. A threshold voltage may be shifted through F-N tunneling in the case of a NAND flash memory and through CHE injection in the case of a NOR flash memory device. The threshold voltage distribution 10 indicates a distribution after the convergence program operation. As a pulse voltage with an increment ΔV of a constant magnitude is applied to a selected word line, a threshold voltage distribution of the memory cells may be shifted in this order of 10→11→12→13→ . . . →20, as shown in FIG. 1A. In an ideal case, a final width of the threshold voltage distribution 20 of programmed memory cells may become ΔV.
FIG. 1B is a diagram showing a variation of a program voltage applied to a selected word line. Referring to FIG. 1B, in order to obtain the final threshold voltage distribution 20 in FIG. 1A, a program voltage with a constant increment ΔV has to be applied to a selected word line. Then, whenever the program voltage is applied to the selected word line, a verify operation is carried out to confirm whether the memory cells of the selected word line are programmed, with a verify voltage being applied to the selected word line. When a result indicative of a program passage is obtained, the program operation may be ended.
On the other hand, a threshold voltage distribution 10 obtained after performing the convergence program operation may be widened in the event that the degree of integration is increased and the memory cells are shrunk. An increment of the program voltage may be reduced in order to make the widened threshold voltage distribution become programmed to have a threshold voltage distribution having a sufficient read margin. In the event that the increment is reduced, the threshold voltage distribution can be improved. On the other hand, a decrease in the increment causes an increase in the number of pulses. This forces a program loop number to increase. Accordingly, program speed is remarkably reduced.
As well known in the art, a flash memory device such as a NAND flash memory device has a relatively slower program speed than that of other memory devices. Accordingly, there are required a method and device that are capable of increasing the program speed through a decrease in a program pulse number, that are capable of securing sufficient read margins, and that are capable of guaranteeing a threshold voltage distribution.